Careers

Standard Cell Characterization (and Layout) and EDA Development

Bangalore | 4-7 years

Key Responsibilities:

Mandatory Skills:

  • Experience in Standard Cell Characterization of various Standard cells and Macros (viz. flip flops, latches, multibit flip flops, level shifters, Power Switch Cells, Retention flops, Synchronizer cells etc.) in planer and non-planar technology nodes.
  • Overview of circuit and MC simulations, Layout Dependent effects, RTL2GDS flow.
  • Good understanding of CMOS and FinFET technologies.
  • Good understanding of State of the art EDA tools from Siemens, Cadence and Synopsys including Simulation, and Characterization work.
  • Develop EDA views including Characterization of NLDM, CCSP. CCSN and AOCV, LVF for standard cell libraries
  • Affinity to automation and working Knowledge of Python.

Preferred Skills:

  • Good understanding of CMOS basics and Standard Cell ckts and Device Physics (Latchup, LDE, Electromigration, etc)
  • Know-how of the ASIC design flow.
  • Working knowledge in MS Excel, PowerBI and/or Tableau could be an added advantage
  • Working Knowledge of SKILL / TCL / PERL scripting could be an added advantage.

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